Support apparatus for semiconductor wafer processing

ABSTRACT

A support apparatus for minimizing gravitational stress in semiconductor wafers, and particularly silicon wafers, during thermal processing. The support apparatus comprises two concentric circular support structures disposed on a common support fixture. The two concentric circular support structures, located generally at between 10 and 70% and 70 and 100% and preferably at 35 and 82.3% of the semiconductor wafer radius, can be either solid rings or a plurality of spaced support points spaced apart from each other in a substantially uniform manner. Further, the support structures can have segments removed to facilitate wafer loading and unloading. In order to withstand the elevated temperatures encountered during semiconductor wafer processing, the support apparatus, including the concentric circular support structures and support fixture can be fabricated from refractory materials, such as silicon carbide, quartz and graphite. The claimed wafer support apparatus can be readily adapted for use in either batch or single-wafer processors.

STATEMENT OF GOVERNMENT INTEREST

[0001] This invention was made with Government support under contractNo. DE-AC04-94AL85000 awarded by the U.S. Department of Energy to SandiaCorporation. The Government has certain rights in the invention.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] Not Applicable

BACKGROUND OF THE INVENTION

[0003] The present invention pertains generally to apparatus forsupporting semiconductor wafers during thermal processing andparticularly to apparatus for supporting silicon wafers during hightemperature processing such that gravitational stresses are mitigated.

[0004] Modern microelectronic devices or integrated circuits (ICs) arefabricated using processes in which hundreds of individual ICs or diesare produced simultaneously on a single silicon wafer. The production ofICs generally requires several dozen thermal and deposition processes,all of which are performed on these monolithic single-crystal wafers.These processes are performed either in single-wafer tools or in largebatch furnaces containing up to a few hundred wafers. After processing,the wafers are cut apart to produce individual IC dies.

[0005] The historical trends of reduced IC costs and increasedproductivity in microelectronics manufacturing have been obtained inpart by employing progressively larger silicon wafers. Increasing thesilicon wafer size allows more IC dies to be produced from each siliconwafer. This reduces unit IC costs by reducing handling costs and byincreasing the areal throughputs of both batch and single-wafer tools.The trend of increasing silicon wafer size is also driven in part by thecontinuously increasing size of IC dies. As die sizes increase, thesilicon wafer size must also increase to permit the same number of dieson each wafer. Current production wafers range in diameter up to 200 mm,but the introduction of 300 mm wafers is now under way.

[0006] As silicon wafers are heated and cooled during thermal anddeposition processes, temperature variations arise across the waferface. These temperature variations give rise to thermal stress in thewafer. If the thermal stress exceeds the yield strength of the wafer,slip lines or other microstructural defects will be produced in thewafer crystal. Such defects lead to failure of IC devices and so must bestrictly avoided. Consequently, the importance of controlling thermalstress has been widely recognized. The heating and cooling rates and thepush and pull rates at which silicon wafers are inserted into orwithdrawn from batch furnaces have both been reduced for larger wafersizes in order to reduce temperature variations across the wafers. Onthe other hand, it is desirable to increase heating and cooling rates inorder to increase wafer throughput. Recently, new batch furnace designshave been developed in which the wafer spacing is increased to reducetemperature variations and so permit more rapid heating and cooling.

[0007] Thermal stress is just one of several size-dependent sources ofstress in silicon wafers. As wafer sizes increase, gravitational stressalso increases. Like thermal stress, gravitational stress will lead tocrystal defects if their values exceed the yield strength of the wafer.These stresses arise from supporting the weight of the wafer on alimited number of points and originate both from the local effects ofthe support and, more importantly, from bending of the wafer due to itsweight in unsupported regions. In the past, wafer diameters were smallenough and wafer thicknesses were sufficiently large such thatgravitational stresses were quite small. As such, gravitational stresseshave not been a serious concern, and a wide variety of support methodshave been used successfully for wafer sizes up to 200 mm.

[0008] Silicon wafer thicknesses have historically increased at ratesmuch lower than those of wafer diameters. Nominal wafer thicknesses are625, 725 and 775 μm at wafer diameters of 150, 200 and 300 mm. Sincegravitational stresses generally scale as the square of the waferdiameter and inversely as the wafer thickness, gravitational stresseswill increase even if the wafer thickness grew in proportion to thewafer size. As a result, gravitational stresses have increaseddramatically with increasing wafer size for any fixed support geometry.The increasing importance of gravitational stresses and the necessityfor reducing or eliminating gravitational stresses by providing propersupport for wafers during thermal processing has been recognized asdescribed in U.S. Pat. Nos. 5,492,229 and 5,605,574, by way of example.

[0009]FIG. 1 illustrates the influence of wafer size on gravitationalstress for the wafer thickness variation shown by the dotted line inFIG. 2. Here the computed maximum shear stress appearing anywhere on thewafer is shown for several common support geometries (B, C, and D). Thecommon geometries are: (B) a single ring located at about 70% of thewafer radius; (C) a single ring located at the wafer edge; and (D) athree-point support having support locations at the wafer edge and atangular positions of 0, 90, and 180 degrees. The last of these is a verycommon support geometry for batch furnaces because it permits insertionand withdrawal of the wafers from the front of the multi-wafer supportstructure referred to as a boat.

[0010]FIG. 1 shows that gravitational stress increases rapidly withincreasing wafer size. Between 200 and 300 mm wafer diameters, themaximum gravitational stress roughly doubles for all support geometries.Further, the method of support plays an important role in determiningthese stresses. The maximum shear stress on a wafer for three pointsupport is about a factor of ten above that for an edge ring and nearlya factor of forty above that for a ring placed well in from the waferedge (70% of the wafer diameter).

[0011] Gravitational stresses do not vary with temperature they dependonly on the wafer diameter, wafer thickness and the support geometry. Incontrast, the strength of silicon falls rapidly as the temperature isincreased. As a result, the fixed gravitational stress becomes a largerfraction of the decreasing yield strength as the silicon wafertemperature is increased. With increasing temperatures, the yieldstrength of the silicon wafer decreases to the point at which it becomesequal to the gravitational stress. At this point, the strength of thesilicon has dropped to a level where the silicon wafer is failing underthe stress of its own weight. It will then deform plastically, anddefects will be produced in the crystal structure of the silicon wafer.This behavior has an important practical consequence in limiting boththe maximum possible processing temperature as well as the allowableramp rate (the rate at which the furnace and the silicon wafertemperatures increase or decrease).

[0012] Allowable ramp rates and maximum operating temperatures of batchfurnaces are limited by the combined effects of thermal andgravitational stresses. As described hereinabove, thermal stress arisesfrom the radial temperature gradients associated with heating andcooling of wafers. Faster ramp rates produce larger temperaturedifferences and, hence, larger thermal stresses. Gravitational stress isassociated with bending of the wafer under its own weight. Withincreasing wafer diameter, thermal stress remains invariant (for a givenradial temperature difference) while gravitational stress increases asthe square of the wafer diameter. Thus, as the wafer size increases thereduction of gravitational stress becomes of increasing importance inallowing higher maximum operating temperatures and increased furnaceramp rates.

[0013]FIG. 2 shows computed maximum allowable processing temperatures asa function of wafer size for the support geometries previouslyconsidered in FIG. 1. Note that support geometry has a strong influenceon the maximum temperature. For a 200 mm wafer, the maximum temperaturethat can be sustained varies by almost 400° C. between the three-pointand ring support geometries (B, C, and D). Further, for a 300 mm waferthe maximum processing temperature for the three point geometry is justabove 900° C. This is well below the desired maximum of about 1200° C.needed to accommodate the full range of thermal and depositionprocesses. Similarly, the computed maximum for a 300 mm wafer supportedby a full edge ring (FIG. 2, curve C) is only about 1150° C. Thus eventhis better support geometry will likely not be sufficient for allprocesses of practical interest. Although many of the maximumtemperatures shown in FIG. 2 are above those of practical interest,these results include only gravitational stress. Other sources, such asthermal and film stresses, will also contribute to the total stress andthus will reduce the maximum allowable temperature.

[0014] Ring supports tend to minimize gravitational stress relative topoint supports by reducing stresses near the support locations. For mostplacements of a single ring, the maximum stress occurs not at thesupport location, but instead near the center or edge of the wafer. Itis known in the art that gravitational stress is minimized for a singlering support if the ring diameter is about 70% of the wafer diameter,regardless of the wafer size. This is one of the geometries consideredin the results shown in FIGS. 1 and 2. For a 300 mm wafer, this supportgeometry gives a maximum allowable processing temperature of about 1300°C. Although this is above most temperatures of practical importance,combined thermal and gravitational stresses would likely yield an actualmaximum temperature that is below the desired values for some processes.Moreover, the single ring support is undesirable for batch waferprocessing applications because it obstructs front end loading of abatch furnace. Therefore, there is a need for further reduction ofgravitational stress coupled with a geometry that will not obstructefficient loading and unloading of a batch furnace or single waferprocessor.

SUMMARY OF THE INVENTION

[0015] The present invention provides a novel support apparatus forsemiconductor wafers, and particularly silicon wafers, that offers asignificant reduction in the magnitude of gravitational stress for allwafer sizes during thermal processing. As silicon wafer diametersincrease beyond 200 mm, reductions in gravitational stress will becomeincreasingly important with respect to the continued use ofhigh-temperature thermal and deposition processes in microelectronicsmanufacturing. Because reducing gravitational stress will permit higherheating and cooling rates in batch furnaces, this apparatus will alsohelp reduce processing times and costs. Finally, the claimed wafersupport apparatus can be readily adapted for use in either batch orsingle-wafer processors.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 shows gravitational stress as a function of wafer size forvarious wafer support structures.

[0017]FIG. 2 shows the maximum allowable processing temperature as afunction of size for various wafer support structures.

[0018]FIG. 3 shows maximum shear stress as a function of ring supportposition.

[0019]FIG. 4 shows a concentric ring embodiment of a support structure.

[0020]FIG. 5 illustrates a spaced point embodiment.

DETAILED DESCRIPTION OF THE INVENTION

[0021] The inventors have determined that gravitational stress thatarises in large diameter semiconductor wafers during thermal processingcan be minimized by the use of two concentric support structures,particularly circular support structures and preferably rings, and haveidentified the optimum positions of the two concentric supportstructures. This optimum placement of the concentric support structureswas determined by computing the maximum shear stress occurring anywherein the wafer for all possible combinations of support positions andselecting those positions which gave the lowest maximum stress. Aportion of this process is illustrated in FIG. 3 for 200 mm wafers.Here, one of two support structures, in the form of rings, is held atthe optimum position while the position of the other is varied over somerange. Such variation in the two ring positions yields two very strongminima in the maximum stress when the inner ring radius is at 35.0 mmand the outer ring radius is at 82.3 mm. Note that the irregularcharacter of these two curves results from abrupt changes in thelocation of the maximum stress as the support locations of the rings arecontinuously varied.

[0022] The optimum placement of two concentric support structuresproduces several unique conditions. Namely, one-third of the waferweight is carried on the inner structure and the remaining two-thirds iscarried on the outer structure. Also, the maximum stress occurssimultaneously at two points on the wafer, corresponding to the twosupport positions. The stress at these two locations is the same wheneach support structure is placed at its optimum position.

[0023]FIG. 1 (curve A) shows that optimum placement of two concentricring support structures reduces the maximum gravitational stress by morethan a factor of 100 below that for the three-point support and by morethan a factor of 10 below that for a single ring support at the waferedge. Compared with the single ring at the optimum position, the maximumstress for a two ring support structure at the optimum positions isreduced by an additional factor of three. Similarly, FIG. 2 (curve A)shows that the present optimum configuration for a two-ring supportstructure should permit a maximum processing temperature of about 130°C. above that for a single ring support at the optimum position, about290° C. above that for a single ring support at the wafer edge, and over500° C. above that for a three-point support.

[0024] Wafer diameter does not affect the optimal support placement,provided that the radii of the inner and outer support structures arescaled with the wafer size. By way of example, as seen in FIG. 3, themaximum shear stress for a 200 mm silicon wafer shows strong minima whenthe inner and outer support structures (support rings) are located at35.0 and 82.3 mm, respectively, from the center of the wafer. Maximumstresses increase rapidly as the support structures (here, supportrings) are moved from these optimum positions. Similarly, the optimumsupport positions for the inner and outer support rings for a 300 mmsilicon wafer are at 52.5 and 123.4 mm from the center of the wafer,respectively. These are the same relative positions of 2r/d=0.350 and0.823 found for a 200 mm wafer. Thus, for both wafer sizes, the minimumstress on the wafer is obtained when the inner and outer ring radii are35.0% and 82.3% of the wafer radius, respectively. This result appliesto any wafer size, and so provides a general basis for specifying theoptimum radial positions of two concentric support structures.

[0025]FIGS. 4 and 5 show two embodiments of the present invention. Inthe first embodiment, the inner and outer support structures arecontinuous rings. The two rings can be attached to a support fixturesuch as a common plate, to one or more common rods, or to some otherstructure that holds the two rings so that their top surfaces liesubstantially in a horizontal plane and rigid so that the two ringsremain concentric. For batch furnace applications, several such wafersupport structures and their associated support fixtures can be placedone above the other in a container such as a vertical carrier means topermit optimum support of multiple wafers in a large stack. The ringsshown in FIG. 4 are continuous and thus present an obstruction toloading of a batch furnace. However, in practice segments can be removedfrom either or both of the rings to provide access for wafer loading andunloading means.

[0026] In a second embodiment of the present support apparatus, shown inFIG. 5, the concentric support structures, such as the ring supportstructures illustrated in FIG. 4, can comprise discrete spaced pointsspaced apart in a substantially uniform manner and arranged in circularand concentric patterns at either or both of the optimum radii of2r/d=0.350 and 0.823. These support points similarly are attached tosome underlying support fixture to form a support assembly. Moreover, afew support points can be omitted to provide access for wafer loadingand unloading means. If the number of support points in both the innerand outer circular patterns are sufficiently large (greater than one andpreferably four for the inner support structure and greater than threeand preferably eight for the outer support structure), the maximumstress produced by the second embodiment will be only slightly greaterthan that produced by the first embodiment.

[0027] Because the present support apparatus is subjected to elevatedtemperatures during thermal processing it is desirable to fabricate thesupport apparatus, including the concentric support structures andsupport fixture from refractory materials, such as silicon carbide,quartz and graphite.

[0028] From the foregoing description and information, one skilled inthe art can readily ascertain the essential characteristics of thepresent invention. The description and information presented above areintended to be illustrative of the present invention and are not to beconstrued as limitations or restrictions thereon, the invention beingdelineated in the following claims.

SEQUENCE LISTING

[0029] Not Applicable.

We claim:
 1. An apparatus for supporting a semiconductor wafer duringthermal processing, comprising: a support fixture for supporting thesemiconductor wafer; and an inner and an outer concentric supportstructure disposed on said support fixture.
 2. The apparatus of claim 1, wherein the inner concentric support structure is located from between10% and 70% of the semiconductor wafer radius and the outer concentricsupport structure is located from between 70% and 100% of thesemiconductor wafer radius.
 3. The apparatus of claim 1 , wherein theinner and outer concentric support structures each comprise a ring. 4.The apparatus of claim 3 , wherein the inner support ring is locatedabout 35.0% of the radius of the semiconductor wafer and the outersupport ring is located about 82.3% of the semiconductor wafer radius.5. The apparatus of claim 3 , wherein each of said concentric supportstructures has a segment removed to permit access for semiconductorwafer loading and unloading means.
 6. The apparatus of claim 1 , whereinat least one concentric support structure is comprised of a plurality ofspaced support points spaced apart from one another in a substantiallyuniform manner.
 7. The apparatus of claim 6 , wherein one or more spacedsupport points is removed from the inner and outer plurality of spacedsupport points to permit access for semiconductor wafer loading andunloading means.
 8. The apparatus of claim 6 , wherein the number ofspaced support points comprising the inner circular support structure isgreater than one.
 9. The apparatus of claim 6 , wherein the number ofspaced support points comprising the outer circular support structure isgreater than three.
 10. The apparatus of claim 1 , wherein said supportfixture comprises a plate-like member having said inner and outerconcentric support structures affixed thereto such that the uppersurfaces of said inner and outer concentric support structures lie in asubstantially horizontal common plane.
 11. The apparatus of claim 1 ,wherein said support fixture comprises rod-like means having said innerand outer concentric support structures affixed thereto such that theupper surfaces of said concentric support structures lie in asubstantially horizontal common plane.
 12. A vertical carrier means forsupporting a plurality of semiconductor wafers during thermalprocessing, comprising: a plurality of support fixtures for supportingsemiconductor wafers, said plurality vertically extending between a topend and a bottom end of the carrier and spaced in a substantiallyuniform manner between the top and bottom ends of the carrier; and aninner and an outer concentric support structure disposed on each supportmember.
 13. The vertical carrier of claim 12 , wherein the innerconcentric support structure is from between 10% and 70% of thesemiconductor wafer radius and the radius of the outer concentricsupport structure is from between 70% and 100% of the semiconductorwafer radius.
 14. The vertical carrier of claim 12 , wherein the innerand outer concentric support structures each comprise a ring.
 15. Thevertical carrier of claim 14 , wherein the radius of the inner ring isabout 35.0% of the radius of the semiconductor wafer and the radius ofthe outer ring is about 82.3% of the semiconductor wafer radius.
 16. Thevertical carrier of claim 12 , wherein each of said inner and outerconcentric circular support structures has a segment removed to permitaccess for semiconductor wafer loading and unloading means.
 17. Thevertical carrier of claim 12 , wherein said support fixture comprises aplate-like member having said inner and outer concentric supportstructures affixed thereto such that the upper surfaces of said innerand outer concentric support structures lie in a substantiallyhorizontal common plane.
 18. The vertical carrier of claim 12 , whereinsaid support fixture comprises rod-like means having said inner andouter concentric support structures affixed thereto such that the uppersurfaces of said concentric support structures lie in a substantiallyhorizontal common plane.
 19. The vertical carrier of claim 12 , whereinat least one concentric support structure is comprised of a plurality ofspaced support points spaced apart from each other in a substantiallyuniform manner.
 20. The vertical carrier of claim 19 , wherein one ormore support points is removed from the inner and plurality of spacedsupport points to permit access for semiconductor wafer loading andunloading means.
 21. The vertical carrier of claim 19 , wherein thenumber of spaced support points comprising the inner circular supportring is greater than one.
 22. The container of claim 19 , wherein thenumber of spaced support points comprising the outer circular supportstructure is greater than three.
 23. The apparatus of claim 1 , whereinthe inner and outer continuous concentric circular support structuresand the support fixture are selected from the group consisting ofquartz, silicon carbide and graphite.
 24. The vertical carrier of claim16 , wherein the plurality of support fixtures and the concentriccircular support structures are selected from the group consisting ofquartz, silicon carbide and graphite.
 25. A method for supporting asemiconductor wafer during thermal processing, comprising: placing thesemiconductor wafer onto a support fixture, the support fixtureincluding; an inner and an outer concentric support structure, whereinthe inner support structure is located from between 10% and 70% of thesemiconductor wafer radius and the outer concentric support structure islocated from between 70% and 100% of the semiconductor wafer radius. 26.The method of claim 25 , wherein the inner and outer concentric supportstructures each comprise a ring.
 27. The method of claim 25 , whereineach concentric support structure is comprised of a plurality of spacedsupport points spaced apart from one another in a substantially uniformmanner.
 28. A support assembly for supporting a semiconductor waferduring processing, comprising: a support fixture having an inner and anouter concentric support structure disposed thereon, wherein the innerconcentric support structure is located from between 10% and 70% of thesemiconductor wafer radius and the outer concentric support structure islocated from between 70% and 100% of the semiconductor wafer radius. 29.A method of manufacturing an apparatus for supporting a semiconductorwafer during thermal processing, comprising the following steps: a)providing a support fixture that supports the semiconductor wafer; andb) coupling an inner and an outer concentric support structure to saidsupport fixture.
 30. The method of claim 29 , wherein the inner supportstructure is located from between 10% and 70% of the semiconductor waferradius and the outer concentric support structure is located frombetween 70% and 100% of the semiconductor wafer radius.
 31. The methodof claim 30 , wherein the inner and outer concentric support structureseach comprise a ring.
 32. The method of claim 30 , wherein eachconcentric support structure is comprised of a plurality of spacedsupport points spaced apart from one another in a substantially uniformmanner.